Importance of FEC for 400G
The rapid adoption of 400G technologies has seen a spike in bandwidth demands and a low tolerance for errors and latency in data transmission. Data centers are now rethinking the design of data communication systems to expand the available bandwidth while improving transmission quality.
Meeting this goal can be quite challenging, considering that improving one aspect of data transmission consequently hurts another. However, one solution seems to stand out from the rest as far as enabling reliable, efficient, and high-quality data transmission is concerned. We've discussed more on Forward Error Correction (FEC) and 400G technology in the sections below, including the FEC considerations for 400Gbps Ethernet.
What Is FEC?
Forward Error Correction is an error rectification method used in digital signals to improve data reliability. The technique is used to detect and correct errors in data being transmitted without retransmitting the data.
FEC introduces redundant data and the error-correcting code before data transmission is done. The redundant bits/data are complex functions of the original information and are sent multiple times since an error can appear in any transmitted samples. The receiver then corrects errors without requesting retransmission of the data by acknowledging only parts of the data with no apparent errors.
FEC codes can also generate bit-error-rate signals used as feedback to fine-tune analog receiving electronics. The FEC code design determines the number of missing bits that can be corrected. Block codes and convolutional codes are the two FEC code categories that are widely used. Convolutional codes handle arbitrary-length data and use the Viterbi algorithm for decoding purposes. On the other hand, block codes handle fixed-size data packets, and partial code blocks are decoded in polynomial time to the code block length.
What Is 400G?
This is the next generation of cloud infrastructure widely used by high-traffic volume data centers, telecommunication service providers, and other large enterprises with relentless data transmission needs. The rapidly increasing network traffic has seen network carriers continually face bandwidth challenges. This exponential sprout in traffic is driven by the increased deployments of machine learning, cloud computing, artificial intelligence (AI), and IoT devices.
Compared to the previous 100G solution, 400G, also known as 400GbE or 400GB/s, is four times faster. This Terabit Ethernet transmits data at 400 billion bits per second, i.e., in optical wavelength; hence it's finding application in high-speed, high-performance deployments.
The 400G technology also delivers the power, data density, and efficiency required for cutting-edge technologies such as virtual reality (VR), augmented reality (AR), 5G, and 4K video streaming. Besides consuming less power, the speeds also support scale-out and scale-up architectures by providing high density, low-cost-per-bit, and reliable throughput.
Why 400G Requires FEC
Several data centers are adopting 400 Gigabit Ethernet, thanks to the faster network speeds and expanded use cases that allow for new business opportunities. This 400GE data transmission standard uses the PAM4 technology, which offers twice the transmission speed of NRZ technology used for 100GE.
The increased speed and convenience of PAM4 also come with its own challenges. For instance, the PAM4 transmission speed is twice as fast as that of NRZ, but the signal levels are half that of 100G technology. This degrades the signal-to-noise ratio (SNR); hence 400G transmissions are more susceptible to distortion.
Therefore, forward error correction (FEC) is used to solve the waveform distortion challenge common with 400GE transmission. That said, the actual transmission rate of a 400G Ethernet link is 425Gbps, with the additional 25 bits used in establishing the FEC techniques. 400GE elements, such as DR4 and FR4 optics, have transmission errors, which FEC helps rectify.
FEC Considerations for 400Gbps Ethernet
With the 802.3bj standards, FEC-related latency is often targeted to be equal to or less than 100ns. Here, the receive time for FEC-frame takes approximately 50ns, with the rest time budget used for decoding. This FEC latency target is practical and achievable.
Using similar/same FEC code for the 400GbE transmission makes it possible to achieve lower latency. But when a higher coding gain FEC is required, e.g., at the PMD level, one can trade off FEC latency for the desired coding gain. It's therefore recommended to keep a similar latency target (preferably 100ns) while pushing for a higher coding gain of FEC.
Given that PAM4 modulation is used, FEC's target coding gain (CG) could be over 8dB. And since soft-decision FEC comes with excessive power consumption, it's not often preferred for 400GE deployments. Similarly, conventional block codes with their limited latency need a higher overclocking ratio to achieve the target.
Assuming that a transcoding scheme similar to that used in 802.3bj is included, the overclocking ratio should be less than 10%. This helps minimize the line rate increase while ensuring sufficient coding gain with limited latency.
So under 100ns latency and less than 10% overclocking ratio, FEC codes with about 8.5dB coding gain are realizable for 400GE transmission. Similarly, you can employ M (i.e., M>1) independent encoders for M-interleaved block codes instead of using parallel encoders to achieve 400G throughput.
400GE transmission offers several benefits to data centers and large enterprises that rely on high-speed data transmission for efficient operation. And while this 400G technology is highly reliable, it introduces some transmission errors that can be solved effectively using forward error correction techniques. There are also some FEC considerations for 400G Ethernet, most of which rely on your unique data transmission and network needs.